In conventional lithography systems, patterns are formed on a substrate such as a semiconductor wafer or flat panel display by projecting light through a patterned mask onto the surface of the substrate which is coated with a thin film of photoresist. After the photoresist is thus exposed by the patterned light, it is developed to form the mask pattern on the surface of the substrate in the form of a pattern of hardened photoresist. The wafer or panel is then subjected to a particular desired microfabrication step such as chemical vapor deposition, ion implantation, oxidation, metal deposition, etc.
In the semiconductor and flat panel display industries, it is highly desirable to fabricate very complex circuit patterns on very small surface areas. Hence, lithography systems which can produce very small feature sizes are in great demand. To achieve small feature sizes, conventional lithography systems include an optical projection subsystem located between the mask and the substrate surface which demagnifies or reduces the image of the mask and projects the reduced image onto the surface of the substrate. By reducing the image of the mask, very small feature sizes, or, equivalently, very high resolution, can be achieved, thus enabling the system to achieve very high circuit densities.
As circuit complexities and panel sizes have increased and feature sizes have decreased, it has become commonplace to use several masks to produce a pattern on the substrate surface, with each mask forming the pattern for a single particular portion of the overall pattern. In these systems, the entire pattern is formed by a series of separate individual exposure steps, each with a different mask in a different position. That is, in a first step, a mask is installed in the system, the substrate is located such that the reduced image of the mask will be projected onto the substrate where it is desired to produce the particular associated portion of the overall pattern, and the exposure is carried out. Next, the mask is replaced with a second mask used to produce a second portion of the overall pattern. The substrate is moved to a new position where the second portion of the pattern is desired, and the second exposure is completed. This process continues until the entire pattern is exposed by all of the required masks.
There are several drawbacks to this "step-and-repeat" approach. First, the individual portions of the overall pattern must be precisely aligned with each other laterally along the surface. The process of aligning the individual portions, commonly referred to as "stitching", can be extremely difficult, time-consuming and expensive. Features such as conductive lines can be extremely narrow, for example, on the order of 10 .mu.m. Where such a line crosses the boundary between two portions of the pattern, it must be aligned so that continuity is not interrupted. It is a standard industry requirement that when portions of a pattern are stitched together, they must be aligned within 10% of feature widths. Hence, with a 10 .mu.m line width, the features must be aligned within 1 .mu.m. Such high accuracy alignment is very difficult to achieve.
Even if the individual portions can be accurately spatially stitched, other inaccuracies can also be introduced. For example, due to the sensitivity of commonly available photoresists, feature size is affected by exposure time and source luminance. Therefore, because of slight inaccuracies in the light source and/or optics of conventional systems which result in varying luminance and exposure time, the sizes of features can vary from portion to portion along the pattern. This can also degrade performance of the final circuit.
Thus, it will be appreciated that forming complex patterns on large substrates such as semiconductor wafers, multichip modules and flat panel displays can be very time-consuming and, hence, very expensive. Each wafer or panel requires several pattern layers, and each pattern layer can require several masks. The masks themselves are very expensive, as are the lithography and microfabrication processes which use them. As larger panels and/or wafers requiring higher resolution are demanded, these costs will continue to rise.
One alternative to the stitching approach has been used in some systems to produce relatively large approximately ten inch diagonal flat panel displays. In these systems, a special full-sized mask is produced with the pattern for an entire panel exposure layer. The mask is placed in close proximity to the flat panel with subaperture projection optics between them. The exposure is performed in either a line or area scanning procedure in which the exposure light is scanned over the panel in a line-by-line or in serpentine fashion until the entire pattern is exposed.
This approach also has several drawbacks. First, the special large mask is very expensive to produce. At the present time, most mask manufacturers are not equipped to produce such large masks, and those that will produce them charge very high premiums. Also, the scanning exposure process can be very time consuming, causing low panel throughput.
In other lithography applications, multiple small identical patterns can be formed on a substrate by repeated exposures, with each exposure creating one pattern or a small subset of the required patterns. These applications include small semiconductor circuits such as transistors and flat panel display pixel circuits. In either case, a typical substrate will have many such circuits formed in a repeating pattern over the entire substrate surface. Although stitching between individual patterns may not be required, this step-and-repeat process can also be very time-consuming and expensive especially where large numbers of patterns are exposed one at a time.